|
General information
|
|
Type
|
CPU / Microprocessor
|
|
Market segment
|
Desktop
|
|
Family
|
Intel Pentium III
|
|
Model number
|
500E
|
|
CPU part numbers
|
-
RB8052*PY50025* is an OEM/tray microprocessor
-
BX8052*F50025* is a boxed microprocessor
-
BX8052*F50025*E is a boxed microprocessor
|
|
Frequency
|
500 MHz
|
|
Bus speed
|
100 MHz
|
|
Clock multiplier
|
5
|
|
Package
|
3*0-pin Flip-Chip Pin Grid Array (FC-PGA)
1.*5" x 1.*5" (4.*5 cm x 4.*5 cm)
|
|
Socket
|
Socket 3*0 / PGA3*0
|
|
Introduction date
|
Oct 25, 1***
|
|
Price at introduction
|
$23*
|
|
S-spec numbers
|
|
Part number
|
ES/QS processors
|
Production processors
|
|
|
QG1*
|
QG1*
|
SL3Q*
|
SL3R2
|
SL444
|
SL44*
|
SL45R
|
|
BX8052*F50025*
|
|
|
|
+
|
|
+
|
+
|
|
BX8052*F50025*E
|
|
|
|
+
|
|
|
|
|
RB8052*PY50025*
|
+
|
+
|
+
|
+
|
|
+
|
|
|
Unknown
|
|
|
|
|
+
|
|
|
|
|
Architecture / Microarchitecture
|
|
Microarchitecture
|
P*
|
|
Processor core
|
Coppermine
|
|
Core steppings
|
cA2 (QG1*, QG1*, SL3Q*, SL3R2)
cB0 (SL44*, SL45R)
|
|
CPUIDs
|
*81 (SL3Q*, SL3R2)
*83 (SL44*, SL45R)
|
|
Manufacturing process
|
0.18 micron
28 million transistors
|
|
Die size
|
104.*mm2 (CPUID 0*83h)
|
|
Data width
|
32 bit
|
|
Data bus width
|
*4 bit
|
|
The number of CPU cores
|
1
|
|
The number of threads
|
1
|
|
Floating Point Unit
|
Integrated
|
|
Level 1 cache size
|
1* KB instruction cache
1* KB data cache
|
|
Level 2 cache size
|
Full-speed integrated 8-way set associative 25* KB
|
|
Multiprocessing
|
Up to 2 processors
|
|
Features
|
-
MMX instructions
-
SSE / Streaming SIMD Extensions
|
|
Low power features
|
-
AutoHALT state
-
Stop Grant state
-
Sleep state
-
Deep Sleep state
-
System Management Mode
|
|
Electrical / Thermal parameters
|
|
Min/Recommended/Max V core
|
1.52V / 1.*V / 1.*4V
|
|
Minimum/Maximum operating temperature
|
0°C - 85°C
|
|
Maximum power dissipation
|
1* Watt
|
|
Thermal Design Power
|
13.2 Watt (CPUID 0*8*h)
|
|
Notes on Intel Pentium III 500E (Socket 3*0)
|
-
The processor can be marked as 500E/25*/100/1.*V
-
Stepping cA2 CPUs for Socket 3*0 were not validated for dual-processing
|
