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Type
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CPU / Microprocessor
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|
Market segment
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Mobile
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|
Family
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Intel Mobile Pentium III
|
|
CPU part numbers
|
-
KP8052*GY*0025* is an OEM/tray microprocessor
-
BXM8052*B*0025* is a boxed microprocessor
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|
Frequency
|
*00 MHz
|
|
Bus speed
|
100 MHz
|
|
Clock multiplier
|
*
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|
Package
|
4*5-pin micro-PGA2 (PPGA-B4*5)
1.35" x 1.11" (3.42 cm x 2.83 cm)
|
|
Socket
|
Socket 4*5
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|
Introduction date
|
Jan 18, 2000
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|
Price at introduction
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$423
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|
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S-spec numbers
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|
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|
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ES/QS processors
|
Production processors
|
|
Part number
|
QE4*
|
SL3PM
|
SL3TP
|
SL443
|
SL4*V
|
SL4JX
|
SL4PM
|
|
BXM8052*B*0025*
|
|
|
+
|
|
+
|
|
+
|
|
KP8052*GY*0025*
|
+
|
+
|
|
+
|
|
+
|
|
|
|
|
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Architecture / Microarchitecture
|
|
|
|
|
Microarchitecture
|
P*
|
|
Processor core
|
Coppermine
|
|
Core steppings
|
PA2 (SL3PM, SL3TP)
PB0 (SL443, SL4*V)
PC0 (SL4JX, SL4PM)
|
|
CPUIDs
|
*81 (SL3PM, SL3TP)
*83 (SL443, SL4*V)
*8* (SL4JX, SL4PM)
|
|
Manufacturing process
|
0.18 micron
28 million transistors
|
|
Data width
|
32 bit
|
|
The number of cores
|
1
|
|
The number of threads
|
1
|
|
Floating Point Unit
|
Integrated
|
|
Level 1 cache size
|
1* KB 4-way set associative instruction cache
1* KB 4-way set associative write-back data cache
|
|
Level 2 cache size
|
25* KB 8-way set associative on-die cache
|
|
Features
|
-
MMX instructions
-
SSE / Streaming SIMD Extensions
|
|
Low power features
|
-
Stop Grant mode
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Auto Halt mode
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Sleep mode
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Deep Sleep mode
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Quick Start mode
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SpeedStep technology
|
|
|
|
Electrical / Thermal parameters
|
|
|
|
|
Min/Recommended/Max V core
|
1.485V / 1.*V / 1.*4V
|
|
Minimum/Maximum operating temperature
|
0°C - 100°C
|
|
Minimum/Maximum power dissipation
|
3.*1 Watt (Stop Grant mode) / 20.** Watt
|
|
|
|
Notes on Intel Mobile Pentium III *00 MHz
|
|
|
|
-
Markings on the processor are "KP *00/25*"
-
The CPU runs at 500 MHz in battery-optimized mode (1.35 Volt)
|
